3.12 DRAM

• Memory devices that store binary data by charging the gate capacitance of MOS transistors that therefore need to be refreshed periodically so as not to lose the charge when present 

3.11 Static RAM

• Semiconductor RAM memory device that consist essentially of FF registers and the necessary circuitry for decoding. Information will remain valid as long as power is on

3.10 RAM Architecture

• RAM typically come with word capacities of 1K, 4K, 8K, 16K or 64K and word size of 1, 4 or 8 bits

3.9 Semiconductor RAMs

• RAMs are used in computers for temporary storage of programs and data (volatile)

3.8 ROM Applications

• Firmware
• Bootstrap Memory
• Data Tables
• Data Converter
• Auxiliary storage

3.7 Flash Memory

• Nonvolatile memory IC that has the high-speed access and in-circuit eras-ability of EEPROMs but with higher densities and lower cost

3.6 Types of ROM

• Mask-Programmed ROM - requires manufacturer to load data using photographic negative technique
• Programmable ROM (PROM) - can be programmed once by the user
• Erasable Programmable ROM (EPROM) - can be erased and reprogrammed multiple time with UV light
• Electrically Erasable PROM (EEPROM) - can be erased and reprogrammed multiple time with voltage

3.5 ROM Timing

• Propagation delay between the application of a ROM's inputs and the appearance of the data outputs during a READ operation is called access time
• Access time is a measure of ROM operating speed 
• Output enable time is the delay between the !CS input and the valid data output

3.4 ROM Architecture

• Four basic parts:
• Row decoder (address decoder that determine which register in the array will place its data onto bus)
• Column decoder 
• Register array (section that stores the data that have been programmed into the ROM)
• Output buffers

3.3 Read-Only Memories

• ROM semiconductor memory is designed to hold data that are either permanent or will not change frequently

3.2 General Memory Operation

• Basic function:
• Select the address in memory 
• Select a READ or WRITE operation
• Supply input data to memory if WRITE; hold output data from memory if READ
• ENABLE/DISABLE memory so that it will (or will not) respond to address input and read/write command

Chp 3 Memory Devices

• Internal Memory (main memory) is the highest speed memory in computer and is always a semiconductor memory (ie. RAM, ROM)
• Auxiliary Memory (mass storage) is slower in speed than internal memory and is always nonvolatile. (ie. Magnetic disk)

2.20 Common Test Equipment

• Logic probe (indicates low, high, indetermine, pulsing logic level)
• Logic pulser (generates a short duration pulse)
• Current tracer (detect changing current)
• Logic analyzer (store and display several channels of digital data)

2.19 External Faults

• Common external faults:
• Open signal lines
• Shorted signal lines
• Faulty power supply
• Output loading

2.18 Internal Digital IC Faults

• Four internal faults:
• Malfunction in internal circuitry
• Inputs or outputs shorted to ground or Vcc
• Inputs or outputs open-circuited
• Short between two pins (other than ground or Vcc)

2.17 Troubleshooting Digital Systems

• Basic card swapping requires identifying defective device or printed circuit card and then replacing it
• Simple signal checking requires the technician to determine the exact nature of anomaly and then replace or repair the individual component

2.16 Arithmetic Circuits

• Arithmetic Logic unit (ALU) is a collection of arithmetic circuits (adder, subtracter, etc) 

2.15 Multiplexers

• A multiplexer is a logic circuit that accepts several data inputs and allows only one of them at a time to get through to the output

2.14 Encoders

• An encoder performs the opposite operation of a decoder
• For a priority encoder, the outputs would be the binary code for the highest-numbered input that is activated

2.13 Decoders

• A decoder is a logic circuit which can take the N-bit code as logic inputs and then generate an appropriate output signal to identify which of the 2^N combinations is present.

2.12 Data Bus Operation

• Basic operation: one device has its outputs enabled so that its data are placed on the data bus; another device has its inputs enabled so that it can take these data off the bus and latch them into its internal circuitry on the appropriate clock edge
• A bus driver IC has tri-state outputs with a very low output impedance that can rapidly charge and discharge the bus capacitance
• This bus capacitance represents the cumulative effect of all the parasitic capacitance of different inputs and outputs tied to the bus, and can deteriorate the bus signal transition time if they are not driven from a low-impedance signal source.    

2.11 Data Busing

• Data bus is simply a collection of conducting paths over which digital data are transmitted from one device to another

2.10 IC Registers

• It is rarely necessary to construct registers from individual FFs because of wide availability of integrated-circuits registers

2.9 FF Registers

• A simple register is a group of memory devices used to store binary information
• FF registers example: counter, buffer and shift registers
• Parallel transfer: Faster transition
• Serial transfer: Fewer interconnection   

2.8 Setup and Hold Times

• Two timing requirements must be met if a clocked FF is to respond reliably to its control inputs when the active CLK transition occurs
• The setup time is the time interval immediately preceding the active transition of the CLK signal, during which the synchronous input has to be maintained at the proper level
• The hold time is the time interval immediately following the active transition of the CLK signal, during which the synchronous input has to be maintained at the proper level
• Synchronous inputs must be stable for setup time range prior to the clock transition, and for hold time range after the clock transition 

2.7 Synchronous and Asynchronous FF inputs

• Synchronous control inputs must be used in conjunction with a clock signal to trigger the FF
• Asynchronous control inputs can be used to trigger the FF at any time regardless of conditions at the other inputs. (override inputs)

2.6 Clocked Flip Flops

• Clocked flip flops will change states at the appropriate clock transition and will rest between successive clock pulses
• Example: Edge-triggered D, JK flip flop, D-type Latch (change state when Enable signal is high)

2.5 Clock Signals

• Synchronous sequential systems: the sequence of operations that takes place is synchronized by a master clock signal
• 0-to-1 transition is called the rising edge or positive edge of clock signal
• 1-to-0 transition is called the failing edge or negative edge of clock signal

2.4 Flip Flops

• Flip flop is a memory circuit (output depend on the previous state of the inputs)

2.3 Tri-Stare Logic

• Development of bus-organized computers led to the development of tri-state logic
• The third condition is called the high-impedance or high-Z state
• Tri-state logic is used to prevent bus contention

2.2 Logic Gates

• Logic gates are digital circuits that have two or more logic inputs and produce a single output with a logic level determined by the inputs logic.
• Example: AND, OR, NOT, NAND, NOR, Exclusive OR, Exclusive NOR

2.1 Parallel and Serial Transmission

• In parallel transmission, each bit is derived from a separate circuit output and transmitted over a separate line
• In serial transmission, only one signal output line is used to transmit the binary number. (clock signal is used to provide the sequencing)

Chp 2 Digital Circuits

• Digital circuit is designed to operate on voltage signal that are binary in nature (two possible values at any time)

Motorola 68HC11 Floating-Point Format

• Sign: LSB (Byte 0)
• Mantissa - Byte 1 - 3
• Exponent - MSB (Byte 4)

1.9 Floating-Point Numbers

• ANSI/IEEE 754 Standard defined floating-point binary numbers: Single-precision (32 bits), Double-precision (64 bits) and Extended-precision (80 bits)
• In single-precision floating-point binary numbers:
• sign bit is represented by bit 31
• exponent (E) is represented by bit 23 - 30
• mantissa (M) is represented by bit 0 - 22 
• When sign bit is 0: positive number; when sign bit is 1: negative number (signed magnitude form)
• Mantissa also known as significand represents the leading significant bits in the number (stored in normalized form)
• A bias (12710) is added to actual exponent to create a positive number

1.8 Hexadecimal Arithmetic

• Hex numbers are used extensively in machine language and computer memories (addresses)
• Hex negation can be done by subtracting each hex digit from F, then add 1 to the LSD

1.7 Binary Division

• In modern machine, division operation are usually carry out using 2's complement subtraction (complementing the subtrahend and adding)

1.6 Multiplication of Binary Numbers

• Multiplication of binary numbers is the same as multiplication of decimal numbers

1.5 Subtraction in 2's Complement System

• Procedure:
1. 2's complement subtrahend
2. Added result to minued

1.4 Addition using Signed Numbers

• Carry generated by MSD is disregarded

1.3 Binary Arithmetic

• Binary addition is used for the operations of subtraction, multiplication and division in digital systems
• Binary subtraction is performed with addition via 2's complement form
• Sign bit is used to represent the sign of the number ( + or -)
• True magnitude form vs 2's complement form
• We negate a signed binary number by 2's complementing it 

1.2 Codes

• Binary-code decimal (BCD) is a code where each digits of a decimal number is represented by its binary equivalent
• Alphanumberic codes are codes that represent numbers, letters and special characters (ie. ASCII)
• Parity bit is used to detect error during binary-code info transfering

1.1 Digital Number Systems

• Octal system has a base of 8
• Hexadecimal system has a base of 16

Chp 1: Number Systems and Codes

• Binary digit (bit) is a digit that can take on only the values of 0 and 1